The scientific activity of the FALSE (Formal methods and Algorithms for Large-Scale systEms) laboratory concerns the definition and application of formal methods and algorithms in the context of modern SW and HW systems. Such systems are characterized by a wide scalability and have high structural and behavioral complexity at any architectural level they are considered: both at high-level of SW applications, Systems of Systems (SoS); and at low-level of HW architectures, Very Large Scale Integration Systems (VLSI). In order to deal with the design complexity of such systems, it is fundamental to have rigorous methods for system modeling, algorithms for the decomposition and logic synthesis, and techniques for system model validation and verification.

Main research areas:

  • SW Systems: Formal methods for system design, validation and verification (Coordinator: Prof. Elvinia Riccobene);
  • HW Systems: Algorithms for circuit design and logic synthesis (Coordinator: Prof. Valentina Ciriani);